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Mount-first Ng  :: Information Technologist, EITC, E3-550.        O +-—/~~\
(204)-474-9657  :: Dept. of Electrical and Computer Engineering.   X--/\/\/\
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Begin forwarded message:

From: "Keysight EEsof EDA" <keysight_eesof-eda@email.keysight.com>
Subject: News: Electrothermal in ADS, Root Cause of Eye Closure, Phased Array Design
Date: March 21, 2018 at 11:29:44 AM CDT
To: "mount-first.ng@umanitoba.ca" <mount-first.ng@umanitoba.ca>
Reply-To: "Keysight EEsof EDA" <keysight_eesof-eda@keysight.com>

EEsof EDA Newsletter
PathWave
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Introducing Pathwave, the first design and test software platform created to accelerate your workflow by connecting every step in your product development path - from design and simulation, to prototype and test, to manufacturing.

How To Set Up an ADS Electrothermal Simulation
ADS2017 Electro-ThermalThe ADS Electro-Thermal Simulator provides a full 3-D thermal solver that is tightly integrated with the ADS layout environment and circuit simulators. This video walks you through the steps of setting up an electrothermal simulation in ADS for better accuracy, efficiency, and speed. Watch Electro-Thermal video now.
Try a free 30-day trial of ADS now.
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How To Calculate and Plot Data at N dB Backoff
N dB BackoffPower amplifier designers often want to see data at N-dB backoff point(s). These are output power levels that are N-dB lower than some specified power or N-dB lower than the power at the X-dB gain compression point. How do you do this with ADS? Registered users can use this ADS 2017 workspace that has a swept-power load pull simulation and a data display that shows data at various N-dB backoff points.
Try a free 30-day trial of ADS now.
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Linking Optimization Goal Values to Limit Lines
Optimize w/Limit LinesADS 2017 has a new feature that makes it easier to draw limit lines. When running an optimization, you can save the optimization goal values (limits) into the dataset and use them to draw limit lines on your plots in the Data Display. Registered users can download the Optimizing Limit Lines example.
Try a free 30-day trial of ADS now.
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Webcast: High Accuracy GaN Models for Rapid High Efficiency Power Amplifier Design
ADS Modelithics Qorvo WebcastThis webinar will focus on model-based PA design methods, utilizing ADS along with state-of-the-art non-linear GaN models available from Modelithics for a range of Qorvo high-performance GaN-on-SiC power transistors. A systematic design flow will be exemplified for the case of a 160W Class AB GaN reference design that achieved all goals with no tuning required. Applications of similar flows to other high-efficiency modes such as Class E/F, Class J and Doherty® amplifier configurations will also be discussed. Register for PA webcast.
Try a free 30-day trial of ADS now.
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Tutorials in Signal Integrity Webcast Series:
Decoupling Capacitor Optimization for Power Integrity
Power Integrity WebcastSelecting the right decoupling capacitors for flat target impedance improves the power integrity of a power delivery network while often decreasing cost. Learn how to use ADS PIPro to generate Electromagnetic (EM) models that account for PCB parasitics and then use the models to optimize the decoupling capacitors for low milliohms of impedance. See an example solution with a full end-to-end circuit simulation using state-based-average models for the point of load (POL) dc to dc converters, PCB EM models, and package/die models. Register for PI webcast now.
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Tim’s Blackboard: Root Cause of Eye Closure
Eye DiagramsEven when you do everything right, i.e., using controlled impedance lines and termination strategy, loss remains a problem when traces are long and when transmitting in the Gigabit regime. Specifically, it is the frequency-dependent loss that significantly degrades the signal quality at the receiver. This month on Tim’s Blackboard we study one of the root causes of eye closure. Visit Tim’s Blackboard to learn more and to download an ADS workspace to experiment with!
Try a free 30-day trial of ADS now
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Link the IC-CAP Modeling Tool to External Simulators
Linking to IC-CAPIC-CAP is a tool that enables modeling engineers to extract device model parameters using the simulator of their choice. For each model parameter extraction, measured data is compared against simulated data, and parameters are optimized to achieve the closest fit to the measured data. Because different simulators may use different syntax or "templates," adding a new simulator that is not supported requires its output to be adapted to one of these templates. Learn more about linking IC-CAP to external simulators.
Try a free 30-day trial of IC-CAP now.
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How to Avoid Costly Mistakes in Designing Phased Array Systems
Designing Phased ArraysThis video shows how to avoid 3 costly steps in designing a phased array. 1) Not predicting the failure of spurious emission masks (SEM) in simulation, which leads to higher development cost and missing time to market windows. 2) Not exploring thoroughly in one simulation, which leads to blind angles. 3) Relying primarily on spreadsheet calculations, which leads to longer design and development cycles. Watch Phased Array How 2 video now.
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In the News:
 Solve Power Integrity Problems in FPGA Systems Using an Embedded Vector Network Analyzer
 Split Planes and What Happens When Microstrip Signals Cross Them
 Creating an Impedance Matching Method for Wireless Battery Charging
 Two New Open Source Tools for De-embedding
 Keysight Collaborates with Leading Research Centers in Europe, Middle East, Africa, India to Reach Milestone in Low-Frequency Noise Measurement
 Keysight Technologies at MWC18

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RF Simulation Basics
On Demand

Satellite 2018
Washington DC
Mar 13-15

OFC 2018
San Diego, CA
Mar 13-15

RF Back to Basics
Greenbelt, MD
Mar 13
Westford, MA
Mar 21
Independence, OH
Apr 19
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May 8
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May 22

ADS Fundamentals
Calabasas, CA
Mar 27-29
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June 5-7
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Aug 7-9
Santa Rosa, CA
Nov 6-8

WAMICON
Sand Key, FL
Apr 9-10

Overcome Phased Array Limitiations Seminar
Hillsboro, OR
Apr 17
Bellevue, WA
Apr 19

Genesys Fundamentals
Calabasas, CA
May 22-24
Santa Rosa, Ca
Sept 11-13

SystemVue
Calabasas, CA
July 11

Using ADS - Online via WebEx
July 17-18

EMPro Fundamentals
Morrisville, NC
Oct 2-3

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How to Design for Power Integrity: Selecting a VRM

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Mindbender
A painting job can be completed by 7 painters in 17 days. If 7 more painters join the team 7 days after starting work on the job, then how many more days are required to complete the job?
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