April 2022 - ECE-Software - University of Manitoba Mailing Lists

Fwd: Register for MATLAB EXPO 2022: May 17–18
by Mount-first Ng 21 Apr '22

21 Apr '22

================= Mount-first.Ng(a)umanitoba.ca<mailto:Mount-first.Ng@umanitoba.ca> ================ /\ Mount-first Ng :: Information Technologist, EITC, E3-550 O +--/~~\ (204)-474-9657 :: Dept. of Electrical and Computer Engineering X--/\/\/\ ================= University of Manitoba ===================== | \/ \ Begin forwarded message: From: MATLAB EXPO 2022 <mathworks(a)go.mathworks.com<mailto:mathworks@go.mathworks.com>> Subject: Register for MATLAB EXPO 2022: May 17–18 Date: April 21, 2022 at 3:05:01 AM CDT To: mtfirst(a)ad.umanitoba.ca<mailto:mtfirst@ad.umanitoba.ca> Reply-To: MATLAB EXPO 2022 <matlabexpo2022(a)mathworks.com<mailto:matlabexpo2022@mathworks.com>> Caution: This message was sent from outside the University of Manitoba. To view this email as a web page, click here<http://app.go.mathworks.com/e/es?s=646005169&e=13543288&elqTrackId=3e0c3ae5…>. [MATLAB EXPO] Deepen Your Knowledge at MATLAB EXPO 2022 May 17–18 | Online Register<https://www.matlabexpo.com/online/2022.html?s_v1=43213&elqem=3630450_EM2_WW…> Join talks by scientists and engineers in industry and academia. See how they use the newest capabilities in MATLAB and Simulink to drive progress in research, development, and education. Plus, * Participate in the Women in Tech discussion as the panelists share their insights and journeys in the fields of science and engineering * Join education-focused talks in the Preparing Future Engineers track * Meet with partner companies in their virtual booths * Engage with MathWorks experts at the Exhibitor Hall * Attend hands-on workshops [Highlights] Session Highlights [Dr. Tanya Morton] Save the Earth: Accelerate Climate Science and Electrify Everything Dr. Tanya Morton, MathWorks [Dr. Talitha Washington] Advancing AI and Data Science Through Industry/Academia Collaboration Dr. Talitha Washington, Clark Atlanta University and Atlanta University Center [Heather Gorr and Michael Carone] What's New in MATLAB and Simulink R2022a Heather Gorr and Michael Carone, MathWorks [Gaby Arellano Bello and María Elena Gavilán Alfonso] Preparing Engineers for the Growing AI Workforce Gaby Arellano Bello and María Elena Gavilán Alfonso, MathWorks See full agenda<http://app.go.mathworks.com/e/er?s_v1=43213&elqem=3630450_EM2_WW_LEV_22-05_…> Participation is free, but registration is required. Reserve your spot today. We look forward to seeing you at MATLAB EXPO 2022. Regards, The MATLAB EXPO Team Join the Conversation #MATLABEXPO<http://app.go.mathworks.com/e/er?s_v1=43213&elqem=3630450_EM2_WW_LEV_22-05_…> [Live] 4 live 4 times per day [Attendees] 10K+ expected attendees [Sessions] 50+ interactive sessions [MathWorks] © 2022 The MathWorks, Inc. MATLAB and Simulink are registered trademarks of The MathWorks, Inc. See a list of additional trademarks<https://www.mathworks.com/company/aboutus/policies_statements/trademarks.ht…>. Other product or brand names may be trademarks or registered trademarks of their respective holders. You are subscribed as mtfirst(a)ad.umanitoba.ca<mailto:mtfirst@ad.umanitoba.ca> Manage<https://go2.mathworks.com/preference-center?s_v1=43213&elqem=3630450_EM2_WW…> your email preferences or unsubscribe from our commercial email promotions. View our privacy policy<https://www.mathworks.com/company/aboutus/policies_statements.html?s_v1=432…>. The MathWorks, Inc.<https://www.mathworks.com/?s_v1=43213&elqem=3630450_EM2_WW_LEV_22-05_MATLAB…> - 1 Apple Hill Drive, Natick, MA 01760 - 508-647-7000

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Fwd: INVITATION: Introduction to Intel Quartus Design Tools - Ask an Expert!
by Mount-first Ng 19 Apr '22

19 Apr '22

================= Mount-first.Ng(a)umanitoba.ca<mailto:Mount-first.Ng@umanitoba.ca> ================ /\ Mount-first Ng :: Information Technologist, EITC, E3-550 O +--/~~\ (204)-474-9657 :: Dept. of Electrical and Computer Engineering X--/\/\/\ ================= University of Manitoba ===================== | \/ \ Begin forwarded message: From: Intel FPGA Training <intel(a)plan.intel.com<mailto:intel@plan.intel.com>> Subject: INVITATION: Introduction to Intel Quartus Design Tools - Ask an Expert! Date: April 19, 2022 at 1:02:09 PM CDT To: mtfirst(a)ad.umanitoba.ca<mailto:mtfirst@ad.umanitoba.ca> Reply-To: Intel FPGA Training <fpgatraining(a)intel.com<mailto:fpgatraining@intel.com>> Caution: This message was sent from outside the University of Manitoba. [Intel] Introduction to Intel®Quartus® Prime Design Software for FPGA Development Ask an Expert! <http://app.plan.intel.com/e/er?cid=em&source=elo&campid=psg_WW_dcaipsgloc_E…> Join us to get your questions answered by an Intel expert! Register now[https://img03.en25.com/EloquaImages/clients/IntelCorporation/%7B0230aad…<http://app.plan.intel.com/e/er?cid=em&source=elo&campid=psg_WW_dcaipsgloc_E…> [https://img03.en25.com/EloquaImages/clients/IntelCorporation/%7Bf0f796ec-1a…] [https://img03.en25.com/EloquaImages/clients/IntelCorporation/%7Bf0f796ec-1a…] [https://img03.en25.com/EloquaImages/clients/IntelCorporation/%7Bf0f796ec-1a…] [https://img03.en25.com/EloquaImages/clients/IntelCorporation/%7Bf0f796ec-1a…] [http://images.plan.intel.com/EloquaImages/clients/IntelCorporation/%7B75069…] [https://img03.en25.com/EloquaImages/clients/IntelCorporation/%7Bf0f796ec-1a…] Session 1: Tuesday, April 26, 2022 For the Americas and Europe 9:00am-‌10:00am PDT/16:00-17:00 GMT Session 2: Wednesday, April 27, 2022 For India and Asia-Pacific 9:30am-10:30am IST Register now[https://img03.en25.com/EloquaImages/clients/IntelCorporation/%7B0230aad…<http://app.plan.intel.com/e/er?cid=em&source=elo&campid=psg_WW_dcaipsgloc_E…> Ask an Expert! Mount-first, This is your chance to come ask an expert about the Intel®Quartus® Prime Design Software Tools for FPGA development. This is an interactive session where you can come and get answers to questions, or interact with other like-minded designers who are using the Intel Quartus Prime Sotware Tools for FPGA Development. It doesn’t matter what level you’re at! If you’re new to FPGA development and the Intel Quartus Prime Design Sotware, come and find out more. If you’ve been developing FPGA solutions for a while, come ask some of those detailed questions you’ve been wanting answered. This is an opportunity to explore the Intel Quartus Prime Design Software Tools together. Note: The session will be conducted in English. About the Intel® Quartus® Prime Design Software The Intel® Quartus® Prime Pro Edition Software is the premier tool suite for doing FPGA development with Intel®FPGAs. The Intel® Quartus® Prime software GUI supports easy design entry, fast design processing, straightforward device programming, and integration with other industry standard EDA tools. The user interface makes it easy for you to focus on your design— not on the design tool. The modular Compiler streamlines the FPGA development process, and ensures the highest performance for the least effort. The Intel® Quartus® Prime Pro Edition software offers flexible design methodologies, advanced synthesis, and supports the latest Intel® FPGA architectures and hierarchical design flows. The compiler provides powerful and customizable design processing to achieve the best possible design implementation in silicon. The following features are unique to the Intel®Quartus® Prime Pro Edition: * Hyper-Aware Design Flow—use Hyper-Retiming and Fast Forward compilation to reach the highest performance in Intel Agilex™ and Intel Stratix® 10 devices. * Intel Quartus Prime Pro Edition synthesis—integrates new, stricter language parser supporting all major IEEE RTL languages, with enhanced algorithms, and parallel synthesis capabilities. Added support for SystemVerilog 2009. * Hierarchical project structure—preserve individual post-synthesis, post-placement, and post-place and route results for each design instance. Allows optimization without impacting other partition placement or routing. * Incremental Fitter Optimizations—run and optimize Fitter stages incrementally. Each Fitter stage generates detailed reports. * Faster, more accurate I/O placement—easily make legal I/O placement assignments for entire interfaces in Interface Planner. * Platform Designer—quickly create embedded system designs and integrate custom IP into any system. Platform Designer in the Pro Edition also introduces hierarchical isolation between system interconnect and IP components. * Partial Reconfiguration—reconfigure a portion of the FPGA, while the remaining FPGA continues to function. * Block-Based Design Flows—preserve and reuse design blocks at various stages of compilation. Register now[https://img03.en25.com/EloquaImages/clients/IntelCorporation/%7B0230aad…<http://app.plan.intel.com/e/er?cid=em&source=elo&campid=psg_WW_dcaipsgloc_E…> Meet Your Expert [http://images.plan.intel.com/EloquaImages/clients/IntelCorporation/%7Bec069…] Steven Elzinga has been in the Intel FPGA Training group for 5 years. Prior to that, he designed video processing cores in FPGAs and got his start in FPGAs as an applications engineer. His current primary focus is timing closure but teaches on a variety of classes including HLS, timing analysis, and introductory courses. He is also a frequent contributor to the Intel community forums. Catalog of Training from Steven's Group<http://app.plan.intel.com/e/er?cid=em&source=elo&campid=psg_WW_dcaipsgloc_E…> [Do something wonderful.] View in browser.<http://app.plan.intel.com/e/es?s=334284386&e=11373296&elqTrackId=60d21273b1…> This was sent to mtfirst(a)ad.umanitoba.ca<mailto:mtfirst@ad.umanitoba.ca> because you are subscribed to Webinars. To view and manage your marketing-related email preferences with Intel, please click here<https://www.intel.com/content/www/ca/en/my-intel/subscription-center.html#/…>. © 2022 Intel Corporation Intel Corporation, 2200 Mission College Blvd., M/S RNB4-145, Santa Clara, CA 95054 USA. www.intel.com<http://www.intel.com/content/www/us/en/homepage.html?cid=em&source=elo&camp…> Privacy<https://www.intel.com/content/www/ca/en/privacy/intel-privacy-notice.html?c…> | Cookies<https://www.intel.com/content/www/ca/en/privacy/intel-cookie-notice.html?ci…> | *Trademarks<http://www.intel.com/content/www/ca/en/legal/trademarks.html?cid=em&source=…> | Unsubscribe<https://www.intel.com/content/www/us/en/my-intel/unsubscribe.html?ei=CINCP0…> | Manage Preferences<https://www.intel.com/content/www/ca/en/my-intel/subscription-center.html#/…>

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Fwd: SPICE up your PCB design
by Mount-first Ng 01 Apr '22

01 Apr '22

================= Mount-first.Ng(a)umanitoba.ca<mailto:Mount-first.Ng@umanitoba.ca> ================ /\ Mount-first Ng :: Information Technologist, EITC, E3-550 O +--/~~\ (204)-474-9657 :: Dept. of Electrical and Computer Engineering X--/\/\/\ ================= University of Manitoba ===================== | \/ \ Begin forwarded message: From: Altium <webform(a)altium.com<mailto:webform@altium.com>> Subject: SPICE up your PCB design Date: April 1, 2022 at 11:01:27 AM CDT To: mount-first.ng(a)umanitoba.ca<mailto:mount-first.ng@umanitoba.ca> Reply-To: <webform(a)altium.com<mailto:webform@altium.com>> Caution: This message was sent from outside the University of Manitoba. To view this email as a web page, click here<https://pages.altium.com/v/ODE3LVNGVy0wNzEAAAGDhNTgIfInD9cYkBMW2wxPu-LjAewM…> [Altium Designer]<https://pages.altium.com/ODE3LVNGVy0wNzEAAAGDhNTgIXFerrkou3VpsA-fYrWYkBCa-Z…> Hello Mount-First, Today, many designers are not using simulation early enough or often enough in the design process. This opens the door for defect escapes that may not be uncovered until late in the design process when correction costs are highest. Those who do use simulation are generally relegated to an outside “point tool” with a different user interface, data model, and little integration, which can lead to which an increase the likelihood of errors due to missing or out of date design or model information. LIVE WEBINARS <https://pages.altium.com/ODE3LVNGVy0wNzEAAAGDhNTgId0dwbVGXuh1ldfR2gtFD74_SO…> Verify As You Design With Altium Designer® In-Schematic Simulation Capability Date: April 7th, 10:00 am PDT Whether you’re creating a new circuit design or trying to determine whether a substitute for an out-of-stock component will function properly in your existing design, simulation can be a vital, time-saving tool. Join this month’s webinar and see firsthand how simulation helps you easily verify that your finished project functions as intended. In addition to reviewing the the Altium Designer in-schematic circuit simulation workflow, we will cover adding simulation models, as well as viewing and analyzing results. REGISTER NOW<https://pages.altium.com/ODE3LVNGVy0wNzEAAAGDhNTgIfup1CO9DkpaUnwfViUvCkj5rD…> <https://pages.altium.com/ODE3LVNGVy0wNzEAAAGDhNTgIXuAPP_UXegvSDeIWpwHn8TdyG…> Enhance Circuit Performance with Altium Designer Advanced Simulation and Waveform Analysis Date: April 21st, 10:00 am PDT Every design has specific characteristics. You must consider the “care-abouts” and “what-ifs” of your circuit to achieve a high-performing, functional product. By quickly applying mathematical functions, or defining measurements from your waveforms, you can determine how to further enhance your circuit performance. Join our webinar this month and see for yourself how the advanced simulation analysis tools in Altium Designer can make your design-life easier. REGISTER NOW<https://pages.altium.com/ODE3LVNGVy0wNzEAAAGDhNTgIWTyf6s5Uk1rITSXJ0uOSPuaSi…> <https://pages.altium.com/ODE3LVNGVy0wNzEAAAGDhNTgISeIQikG_Z621pBiVOVWmT9s7j…> Electronic Design to Delivery Index (EDDI) Report The latest Electronic Design to Delivery Index (EDDI) report is now available! This free, monthly report provides a detailed picture of global part availability and stock over time. Make smarter buying decisions and anticipate supply chain problems before they derail your go-to-market st <https://pages.altium.com/ODE3LVNGVy0wNzEAAAGDhNTgIVA6GGxKQG9MbhFj8sMnQ5KoL0…> SUBSCRIBE NOW Still want more? Take a look at the links below to see what else we have for you. [https://go.altium.com/rs/817-SFW-071/images/FY21-AA-WeeklyWebinars.jpg]<https://pages.altium.com/ODE3LVNGVy0wNzEAAAGDhNTgIZslyDTlzFd5UmTPo9kQszgoIt…> [https://go.altium.com/rs/817-SFW-071/images/a365_Viewer.jpg] <https://pages.altium.com/ODE3LVNGVy0wNzEAAAGDhNTgIW5lOyFrPJI7DhBVUK36DwYfiX…> [Facebook Logo to Link]<https://pages.altium.com/ODE3LVNGVy0wNzEAAAGDhNTgIQDMSVbnCMRZjznwcLLyFQ7hPU…> [Twitter Logo toLink] <https://pages.altium.com/ODE3LVNGVy0wNzEAAAGDhNTgIe-vL1t7LG2Iv76usGt7usPK4T…> [LinkedIn Logo to Link] <https://pages.altium.com/ODE3LVNGVy0wNzEAAAGDhNTgIUL4f-eECFoE5-r9OQHaN_s4x6…> [Youtube Logo to Link] <https://pages.altium.com/ODE3LVNGVy0wNzEAAAGDhNTgIVrHJq-VKqdIEoaAkAKjWqB28Z…> Altium LLC, 4225 Executive Square, Suite 700, La Jolla, California 92037, United States. Copyright 2021, Altium LLC, all rights reserved. Altium®, ACTIVEBOM®, ActiveRoute®, Altium Designer®, Altium NEXUS®, Altium Vault®, Autotrax®, Camtastic®, Ciiva™, CIIVA SMARTPARTS®, CircuitMaker®, CircuitStudio®, Codemaker™, Common Parts Library™, Draftsman®, DXP™, Easytrax®, LiveDesign®, NanoBoard®, NATIVE 3D™, NEXUS™, Octomyze®, Octopart®, PCBWORKS®, P-CAD®, PDN Analyzer™, Protel®, Situs®, Upverter®, XSIGNALS™, X2™ and their respective logos are trademarks or registered trademarks of Altium LLC or its subsidiaries. All other registered or unregistered trademarks referenced herein are the property of their respective owners and no trademark rights to the same are claimed. <https://pages.altium.com/ODE3LVNGVy0wNzEAAAGDhNTgIVXJC2elsOgJ0FZ3TjpYY-1ew-…> You are receiving this email because you have registered your interest with Altium or Altium products. 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